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 LIN D O C #: 8584
LX8584-XX/8584A-xx/8584B-xx
7A L OW D ROPOUT P OSITIVE R E G U L AT O R S
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DESCRIPTION The LX8584/84A/84B series ICs are low dropout three-terminal positive regulators with a nominal 7A output current. This product family is ideally suited for Pentium(R) Processor and Power PCTM applications requiring fast transient response. The LX8584A is guaranteed to have < 1.2V at 7A and the LX8584/84B < 1.4V at 7A dropout voltage, making them ideal to provide well regulated outputs of 2.5V to 3.6V using a 5V input supply. In addition, the LX8584B also offers 1% maximum voltage reference accuracy over temperature. Fixed versions are also available and are specified in the Available Options table below. Current limit is trimmed above 7.1A to ensure adequate output current and controlled short-circuit current. On-chip thermal limiting provides protection against any combination of overload that would create excessive junction temperatures. The LX8584/84A series products are available in both the through-hole versions of the industry standard 3-pin TO-220 and TO-247 power packages. The LX1431 Programmable Reference in conjunction with the LX8584 7A LDO products offer precision output voltage (see application below) and are ideal for use in VRE applications.
K E Y F E AT U R E S
s THREE-TERMINAL ADJUSTABLE OR FIXED OUTPUT s GUARANTEED 1% VOLTAGE ACCURACY OVER TEMPERATURE (LX8584B) s GUARANTEED 1.2V HEADROOM AT 7A (LX8584A) s GUARANTEED 1.4V HEADROOM AT 7A (LX8584/84B) s OUTPUT CURRENT OF 7A p FAST TRANSIENT RESPONSE p 1% VOLTAGE REFERENCE INITIAL ACCURACY p OUTPUT SHORT CIRCUIT PROTECTION p BUILT-IN THERMAL SHUTDOWN s EVALUATION BOARD AVAILABLE: REQUEST LXE9001 EVALUATION KIT
PRODUCT HIGHLIGHT
A P P L I C AT I O N S
s s s s s PENTIUM PROCESSOR SUPPLIES POWER PC SUPPLIES MICROPROCESSOR SUPPLIES LOW VOLTAGE LOGIC SUPPLIES POST REGULATOR FOR SWITCHING SUPPLY
THE APPLICATION OF THE LX8584A & LX1431 IN A 75 & 166MHZ P54C PROCESSORS USING 3.3V CACHE
5V 3 VIN VOUT 2
VO 7A (See Table Below) PLACE IN P SOCKET CAVITY
LX8584A
1kW ADJ 1 250pF 2 220F 10V Low ESR from Sanyo 0.1F 50V 3 V+ 1 COL REF 8 2.84kW 0.1% 1kW 0.01F
3x 330F, 6.3V Low ESR Oscon Type from Sanyo 100F x 6 10V AVX TYPE TPS
D R O P O U T VOLTAGE V S. OUTPUT C URRENT
P Load
1.5
1k 0.1%
LX8584/84A
TJ = 125C
LX1431
SGND 5 FGND 6
21k 1% JP1
1F x 10 SMD
Input / Output Differential - (V)
LX8584
1.0
LX8584A
VOUT 3.50 3.38
JP1 Short Open
TYPICAL APPLICATION 120/166MHz, VRE, 3.3V Cache 75/90/100/133MHz, STND, 3.3V Cache
0.5
Thick traces represent high current traces which must be low resistance / low inductance in order to achieve good transient response. PA C K A G E O R D E R I N F O R M AT I O N TA (C) Dropout Voltage 1.4V 1.2V
0
1.75
3.5
5.25
7
Output Current - (A)
AVAILABLE O P T I O N S
Part #
LX8584/A/B-00 LX8584/A/B-33
PER
PA R T #
P
Plastic TO-220 3-pin
LX8584-XXCP LX8584B-xxCP LX8584A-xxCP
V
Plastic TO-247 3-terminal
LX8584-XXCV LX8584B-xxCV LX8584A-xxCV
Output Voltage
Adjustable 3.3V
0 to 125
Other voltage options may be available -- Please contact factory for details.
"xx" refers to output voltage, please see table above.
F O R F U R T H E R I N F O R M AT I O N C A L L ( 7 1 4 ) 8 9 8 - 8 1 2 1
Copyright (c) 1997 Rev. 1.2 4/97
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841
1
PRODUCT DATABOOK 1996/1997
LX8584-XX/8584A-xx/8584B-xx
7 A L O W D R O P O U T P O S I T I V E R E G U L AT O R S
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A B S O L U T E M A X I M U M R AT I N G S
(Note 1)
PACKAGE PIN OUTS
TAB IS V OUT
3 2 1
Power Dissipation .................................................................................. Internally Limited Input Voltage ................................................................................................................ 10V Input to Output Voltage Differential ........................................................................... 10V Maximum Output Current ............................................................................................. 8A Operating Junction Temperature Plastic (P Package) ................................................................................................ 150C Storage Temperature Range ...................................................................... -65C to 150C Lead Temperature (Soldering, 10 seconds) ............................................................. 300C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal.
VIN VOUT ADJ / GND*
P PACKAGE (Top View)
* Pin 1 is GND for fixed voltage versions. TAB ON REVERSE SIDE IS VOUT
3 2 1
T H E R MAL DATA
P PACKAGE: THERMAL RESISTANCE-JUNCTION TO TAB, JT THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA V PACKAGE: THERMAL RESISTANCE-JUNCTION TO TAB, JT THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA 1.6C/W 35C/W 2.7C/W 60C/W
VIN VOUT ADJ / GND*
V PACKAGE (Top View)
* Pin 1 is GND for fixed voltage versions.
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
2
Copyright (c) 1997 Rev. 1.2 4/97
PRODUCT DATABOOK 1996/1997
LX8584-XX/8584A-xx/8584B-xx
7A L OW D ROPOUT P OSITIVE R E G U L AT O R S
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ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for the LX8584-XXC/84A-xxC/84B-xxC with 0C TA 125C; VIN - VOUT = 3V; IOUT = 7A. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
LX8584-00/84A-00/84B-00 (Adjustable)
Parameter
Reference Voltage LX8584/84A-00 LX8584B-00 Line Regulation (Note 2) Load Regulation (Note 2) Thermal Regulation Ripple Rejection (Note 3) Adjust Pin Current Adjust Pin Current Change Dropout Voltage LX8584A LX8584/84B LX8584/84B Minimum Load Current Maximum Output Current Temperature Stability Long Term Stability RMS Output Noise (% of VOUT)
Symbol
VREF
Test Conditions
LX8584/84A/84B-00 Min. Typ. Max.
1.238 1.225 1.240 1.238 1.250 1.250 1.250 1.250 0.035 0.1 0.01 83 55 0.2 1.1 1.2 1.1 2 8 0.25 0.3 0.003 1.263 1.275 1.260 1.263 0.2 0.5 0.02
Units
V V V V % % %/W dB A A V V V mA A % % %
IOUT = 10mA, TA = 25C 10mA IOUT 7A, 1.5V (VIN - VOUT), VIN 7V, P PMAX IOUT = 10mA, TA = 25C 10mA IOUT 7A, 1.5V (VIN - VOUT), VIN 7V, P PMAX VREF (V IN) IOUT = 10mA, 1.5V (VIN - VOUT ), VIN 7V V REF (IOUT) VIN - V OUT = 3V, 10mA IOUT 7A VOUT (Pwr) TA = 25C, 20ms pulse VOUT = 3.3V, f =120Hz, COUT = 100f Tantalum, VIN = 5V CADJ = 10F, I OUT = 7A I ADJ IADJ 10mA IOUT 7A, 1.5V (VIN - VOUT), VIN 7V V VREF = 1%, IOUT = 7A VREF = 1%, IOUT = 7A VREF = 1%, IOUT = 6A IOUT(MIN) VIN 7V IOUT (MAX) 1.4V (V IN - VOUT), VIN 7V VOUT (T) VOUT (t) TA = 125C, 1000 hrs VOUT (RMS) TA = 25C, 10Hz f 10kHz
65
100 5 1.2 1.4 1.3 10
7
1
LX8584-33/84A-33/84B-33 (3.3V Fixed)
Parameter
Output Voltage LX8584/84A-33
Symbol
VOUT
Test Conditions
LX8584/84A/84B-33 Min. Typ. Max.
3.267 3.234 3.274 3.267 3.30 3.30 3.30 3.30 1 2 5 0.01 83 4 3.333 3.366 3.326 3.333 6 10 15 0.02 10 1.4 1.2 1.4
Units
V V V V mV mV mV %/W dB mA V V V A % % %
VIN = 5V, IOUT = 0mA, TA = 25C 4.75V V IN 10V, 0mA IOUT 7A, P PMAX LX8584B-33 VIN = 5V, IOUT = 0mA, TA = 25C 4.75V V IN 10V, 0mA IOUT 7A, P PMAX Line Regulation (Note 2) VOUT 4.75V V IN 7V (VIN ) 4.75V VIN 10V Load Regulation (Note 2) VOUT (IOUT) VIN = 5V, 0mA IOUT IOUT (MAX) Thermal Regulation VOUT (Pwr) TA = 25C, 20ms pulse Ripple Rejection (Note 3) COUT = 100F (Tantalum), IOUT = 7.5V Quiescent Current IQ 0mA IOUT IOUT (MAX) , 4.75V VIN 10V Dropout Voltage LX8584-XX V VOUT = 1%, IOUT = IOUT (MAX) LX8584A-xx VOUT = 1%, IOUT = IOUT (MAX) LX8584B-xx VOUT = 1%, IOUT = IOUT (MAX) Maximum Output Current IOUT (MAX) VIN 7V Temperature Stability (Note 3) VOUT (T) Long Term Stability (Note 3) VOUT (t) TA = 125C, 1000 hours RMS Output Noise (% of VOUT) (Note 3) VOUT (RMS) TA = 25C, 10Hz f 10kHz
60
7
8 0.25 0.3 0.003
1
Note 2. Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation. Note 3. These parameters, although guaranteed, are not tested in production.
Copyright (c) 1997 Rev. 1.2 4/97
3
PRODUCT DATABOOK 1996/1997
LX8584-XX/8584A-xx/8584B-xx
7 A L O W D R O P O U T P O S I T I V E R E G U L AT O R S
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A P P L I C AT I O N N O T E S The LX8584/84A/84B series ICs are easy to use Low-Dropout (LDO) voltage regulators. They have all of the standard self-protection features expected of a voltage regulator: short circuit protection, safe operating area protection and automatic thermal shutdown if the device temperature rises above approximately 165C. Use of an output capacitor is REQUIRED with the LX8584/84A/ 84B series. Please see the table below for recommended minimum capacitor values. These regulators offer a more tightly controlled reference voltage tolerance and superior reference stability when measured against the older pin-compatible regulator types that they replace. STABILITY The output capacitor is part of the regulator's frequency compensation system. Many types of capacitors are available, with different capacitance value tolerances, capacitance temperature coefficients, and equivalent series impedances. For all operating conditions, connection of a 220F aluminum electrolytic capacitor or a 47F solid tantalum capacitor between the output terminal and ground will guarantee stable operation. If a bypass capacitor is connected between the output voltage adjust (ADJ) pin and ground, ripple rejection will be improved (please see the section entitled "RIPPLE REJECTION"). When ADJ pin bypassing is used, the required output capacitor value increases. Output capacitor values of 220F (aluminum) or 47F (tantalum) provide for all cases of bypassing the ADJ pin. If an ADJ pin bypass capacitor is not used, smaller output capacitor values are adequate. The table below shows recommended minimum capacitance values for stable operation. RECOMMENDED CAPACITOR VALUES INPUT
10F 10F
Power Supply IN
LX8584/84A /84B
ADJ
OUT
Minumum Load (Larger resistor) Full Load (Smaller resistor) RDSON << RL
1 sec
Star Ground
10ms
FIGURE 1 -- DYNAMIC INPUT and OUTPUT TEST
OVERLOAD RECOVERY Like almost all IC power regulators, the LX8584/84A/84B regulators are equipped with Safe Operating Area (SOA) protection. The SOA circuit limits the regulator's maximum output current to progressively lower values as the input-to-output voltage difference increases. By limiting the maximum output current, the SOA circuit keeps the amount of power that is dissipated in the regulator itself within safe limits for all values of input-to-output voltage within the operating range of the regulator. The LX8584/84A/84B SOA protection system is designed to be able to supply some output current for all values of input-to-output voltage, up to the device breakdown voltage. Under some conditions, a correctly operating SOA circuit may prevent a power supply system from returning to regulated operation after removal of an intermittent short circuit at the output of the regulator. This is a normal mode of operation which can be seen in most similar products, including older devices such as 7800 series regulators. It is most likely to occur when the power system input voltage is relatively high and the load impedance is relatively low. When the power system is started "cold", both the input and output voltages are very close to zero. The output voltage closely follows the rising input voltage, and the input-to-output voltage difference is small. The SOA circuit therefore permits the regulator to supply large amounts of current as needed to develop the designed voltage level at the regulator output. Now consider the case where the regulator is supplying regulated voltage to a resistive load under steady state conditions. A moderate input-to-output voltage appears across the regulator but the voltage difference is small enough that the SOA circuitry allows sufficient current to flow through the regulator to develop the designed output voltage across the load resistance. If the output resistor is short-circuited to ground, the input-to-output voltage difference across the regulator suddenly becomes larger by the amount of voltage that had appeared across the load resistor. The SOA circuit reads the increased input-tooutput voltage, and cuts back the amount of current that it will permit the regulator to supply to its output terminal. When the short circuit across the output resistor is removed, all the regulator output current will again flow through the output resistor. The maximum current that the regulator can supply to the resistor will be limited by the SOA circuit, based on the large input-to-output voltage across the regulator at the time the short circuit is removed from the output.
OUTPUT
15F Tantalum, 100F Aluminum 47F Tantalum, 220F Aluminum
ADJ
None 15F
In order to ensure good transient response from the power supply system under rapidly changing current load conditions, designers generally use several output capacitors connected in parallel. Such an arrangement serves to minimize the effects of the parasitic resistance (ESR) and inductance (ESL) that are present in all capacitors. Cost-effective solutions that sufficiently limit ESR and ESL effects generally result in total capacitance values in the range of hundreds to thousands of microfarads, which is more than adequate to meet regulator output capacitor specifications. Output capacitance values may be increased without limit. The circuit shown in Figure 1 can be used to observe the transient response characteristics of the regulator in a power system under changing loads. The effects of different capacitor types and values on transient response parameters, such as overshoot and undershoot, can be quickly compared in order to develop an optimum solution.
4
Copyright (c) 1997 Rev. 1.2 4/97
PRODUCT DATABOOK 1996/1997
LX8584-XX/8584A-xx/8584B-xx
7A L OW D ROPOUT P OSITIVE R E G U L AT O R S
P
RODUCTION
D
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S
HEET
A P P L I C AT I O N N O T E S OVERLOAD RECOVERY (continued) If this limited current is not sufficient to develop the designed voltage across the output resistor, the voltage will stabilize at some lower value, and will never reach the designed value. Under these circumstances, it may be necessary to cycle the input voltage down to zero in order to make the regulator output voltage return to regulation. RIPPLE REJECTION Ripple rejection can be improved by connecting a capacitor between the ADJ pin and ground. The value of the capacitor should be chosen so that the impedance of the capacitor is equal in magnitude to the resistance of R1 at the ripple frequency. The capacitor value can be determined by using this equation: C = 1 / (6.28 * FR * R1) where: C the value of the capacitor in Farads; select an equal or larger standard value. FR the ripple frequency in Hz R1 the value of resistor R1 in ohms
LX8584/84A/84B OUT IN ADJ IADJ 50A VOUT = VREF 1 + R2 + IADJ R2 R1 R2
VIN
VOUT VREF R1
FIGURE 2 -- BASIC ADJUSTABLE REGULATOR
LOAD REGULATION Because the LX8584/84A/84B regulators are three-terminal devices, it is not possible to provide true remote load sensing. Load regulation will be limited by the resistance of the wire connecting the regulator to the load. The data sheet specification for load regulation is measured at the bottom of the package. Negative side sensing is a true Kelvin connection, with the bottom of the output divider returned to the negative side of the load. Although it may not be immediately obvious, best load regulation is obtained when the top of the resistor divider, (R1), is connected directly to the case of the regulator, not to the load. This is illustrated in Figure 3. If R1 were connected to the load, the effective resistance between the regulator and the load would be: RPeff = RP *
At a ripple frequency of 120Hz, with R1 = 100: C = 1 / (6.28 * 120Hz * 100) = 13.3F The closest equal or larger standard value should be used, in this case, 15F. When an ADJ pin bypass capacitor is used, output ripple amplitude will be essentially independent of the output voltage. If an ADJ pin bypass capacitor is not used, output ripple will be proportional to the ratio of the output voltage to the reference voltage: M = VOUT/VREF where: M VREF a multiplier for the ripple seen when the ADJ pin is optimally bypassed. = 1.25V.
R2+R1 R1
where: RP Actual parasitic line resistance. When the circuit is connected as shown in Figure 3, the parasitic resistance appears as its actual value, rather than the higher RPeff.
RP Parasitic LX8584/84A/84B Line Resistance OUT IN ADJ Connect R1 R2
For example, if VOUT = 2.5V the output ripple will be: M = 2.5V/1.25V= 2 Output ripple will be twice as bad as it would be if the ADJ pin were to be bypassed to ground with a properly selected capacitor. OUTPUT VOLTAGE The LX8584/84A/84B ICs develop a 1.25V reference voltage between the output and the adjust terminal (See Figure 2). By placing a resistor, R1, between these two terminals, a constant current is caused to flow through R1 and down through R2 to set the overall output voltage. Normally this current is the specified minimum load current of 10mA. Because IADJ is very small and constant when compared with the current through R1, it represents a small error and can usually be ignored.
VIN
R1 to Case of Regulator
RL Connect R2 to Load
FIGURE 3 -- CONNECTIONS FOR BEST LOAD REGULATION
Copyright (c) 1997 Rev. 1.2 4/97
5
PRODUCT DATABOOK 1996/1997
LX8584-XX/8584A-xx/8584B-xx
7 A L O W D R O P O U T P O S I T I V E R E G U L AT O R S
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D
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A P P L I C AT I O N N O T E S LOAD REGULATION (continued) Even when the circuit is optimally configured, parasitic resistance can be a significant source of error. A 100 mil (2.54 mm) wide PC trace built from 1 oz. copper-clad circuit board material has a parasitic resistance of about 5 milliohms per inch of its length at room temperature. If a 3-terminal regulator used to supply 2.50 volts is connected by 2 inches of this trace to a load which draws 5 amps of current, a 50 millivolt drop will appear between the regulator and the load. Even when the regulator output voltage is precisely 2.50 volts, the load will only see 2.45 volts, which is a 2% error. It is important to keep the connection between the regulator output pin and the load as short as possible, and to use wide traces or heavy-gauge wire. The minimum specified output capacitance for the regulator should be located near the reglator package. If several capacitors are used in parallel to construct the power system output capacitance, any capacitors beyond the minimum needed to meet the specified requirements of the regulator should be located near the sections of the load that require rapidly-changing amounts of current. Placing capacitors near the sources of load transients will help ensure that power system transient response is not impaired by the effects of trace impedance. To maintain good load regulation, wide traces should be used on the input side of the regulator, especially between the input capacitors and the regulator. Input capacitor ESR must be small enough that the voltage at the input pin does not drop below VIN (MIN) during transients. VIN (MIN) = VOUT + VDROPOUT (MAX) where: VIN (MIN) the lowest allowable instantaneous voltage at the input pin. the designed output voltage for the VOUT power supply system. VDROPOUT (MAX) the specified dropout voltage for the installed regulator. can be used, as long as its added contribution to thermal resistance is considered. Note that the case of all devices in this series is electrically connected to the output. Example Given: VIN = 5V VOUT = 2.8V, IOUT = 5.0A Ambient Temp., TA = 50C RJT = 2.7C/W for TO-220 300 ft/min airflow available Find: Proper Heat Sink to keep IC's junction temperature below 125C.** Solution: The junction temperature is: TJ = PD (RJT + RCS + R SA) + TA where: PD Dissipated power. RJT Thermal resistance from the junction to the mounting tab of the package. RCS Thermal resistance through the interface between the IC and the surface on which it is mounted. (1.0C/W at 6 in-lbs mounting screw torque.) RSA Thermal resistance from the mounting surface to ambient (thermal resistance of the heat sink). TS Heat sink temperature.
TJ Rq JT
TC Rq CS
TS Rq SA
TA
First, find the maximum allowable thermal resistance of the heat sink: TJ - TA - (RJT + R CS ) RSA = PD PD RSA = (VIN(MAX) - VOUT) I OUT = (5.0V-2.8V) * 5.0A = 11.0W 125C - 50C = - (2.7C/W + 1.0C/W) (5.0V-2.8V) * 5.0A = 3.1C/W Next, select a suitable heat sink. The selected heat sink must have RSA 3.1C/W. Thermalloy heatsink 6296B has RSA = 3.0C/W with 300ft/min air flow. Finally, verify that junction temperature remains within specification using the selected heat sink: TJ = 11W (2.7C/W + 1.0C/W + 3.0C/W) + 50C = 124C ** Although the device can operate up to 150C junction, it is recommended for long term reliability to keep the junction temperature below 125C whenever possible.
THERMAL CONSIDERATIONS The LX8584/84A/84B regulators have internal power and thermal limiting circuitry designed to protect each device under overload conditions. For continuous normal load conditions, however, maximum junction temperature ratings must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. This includes junction to case, case to heat sink interface, and heat sink thermal resistance itself. Junction-to-case thermal resistance is specified from the IC junction to the back surface of the case directly opposite the die. This is the lowest resistance path for heat flow. Proper mounting is required to ensure the best possible thermal flow from this area of the package to the heat sink. Thermal compound at the case-toheat-sink interface is strongly recommended. If the case of the device must be electrically isolated, a thermally conductive spacer
6
Copyright (c) 1997 Rev. 1.2 4/97
PRODUCT DATABOOK 1996/1997
LX8584-XX/8584A-xx/8584B-xx
7A L OW D ROPOUT P OSITIVE R E G U L AT O R S
P
RODUCTION
D
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HEET
T Y P I C A L A P P L I C AT I O N S
(Note A)
VIN 10F
LX8584/84A/84B OUT IN ADJ
5V R1 121W 1% C1 10F*
VOUT
VIN
(Note A)
LX8584/84A/84B OUT IN ADJ C1* 10F
VOUT** R1 121W C2 100F
150F
* C1 improves ripple rejection. XC should be R1 at ripple frequency.
R2 365W 1%
R2 1k
* Needed if device is far from filter capacitors. ** VOUT = 1.25V 1 + R2 R1
FIGURE 4 -- IMPROVING RIPPLE REJECTION
FIGURE 5 -- 1.2V - 8V ADJUSTABLE REGULATOR
(Note A)
VIN
LX8584/84A/84B OUT IN ADJ 10F
5V 121W 1% 100F
TTL Output
1k 1k
2N3904
365W 1%
FIGURE 6 -- 5V REGULATOR WITH SHUTDOWN
VIN 10F Tantalum or 100F Aluminum
LX8584/84A/84B-33 OUT IN GND
3.3V Min. 15F Tantalum or 100F Aluminum capacitor. May be increased without limit. ESR must be less than 50mW .
FIGURE 7 -- FIXED 3.3V OUTPUT REGULATOR
Note A: VIN (MIN) = (Intended VOUT) + (VDROPOUT (MAX))
Pentium is a registered trademark of Intel Corporation. Power PC is a trademark of International Business Machines Corporation..
Copyright (c) 1997 Rev. 1.2 4/97
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